Präsentation auf dem PhD Forum der Design Automation Conference Europe (DATE) 2007, Nizza, Frankreich, April 2007
Inhalt: Sigma-Delta Fractional-N PLLs (SD-PLLs) are key components of today's wireless transceivers for the generation and modulation of low-noise RF carrier signals with fast settling times. Due to their mainly digital architecture, SD-PLLs are widely used in very deep submicron CMOS technologies which feature high digital integration density but large analog parameter spread. However, they are difficult to test due to the tight interaction of analog and digital blocks.
With this background, a novel method for a spectral built-in self-test (BIST) of integrated RF Sigma-Delta PLLs (SD-PLL) has been developed that enables verification of key spectral properties like frequency response, phase noise and spurious side bands without external RF test equipment. It has been implemented as a fully digital block on an integrated GSM / UMTS transceiver chip and requires an area of only 0.05 mm2 in a 130 nm CMOS technology.
A digital stimulus generator provides multi-tone sine signals in the range 16 ... 180 kHz with a step size of 1 kHz for efficient testing of PLL spectral properties. Modulation of the PLL is achieved digitally via the fractional frequency word. The modulation signal is available as an oversampled Sigma-Delta bitstream as well as a parallel bus, making it a versatile test signal for other analog and mixed-signal blocks as well.
The PLL RF signal is demodulated and digitized using a first order Frequency Sigma-Delta Modulator (FSDM). The oversampled sigma-delta modulated bitstream at the output of the FSDM contains the demodulated signal, it is spectrally analyzed using a 4th order multi-rate bandpass filter with envelope detector. The bandpass center frequency can be tuned in steps of 300 Hz in the range 300 Hz . . . 135 kHz. This on-chip calculation of spectral energy is an efficient way for test data compaction and allows direct comparison to specifications in the frequency domain.
Both stimulus generator and bandpass filter have been derived from resistively terminated analog reference networks which are robust against parameter variations. This robustness is preserved in the digital domain by implementing the filter with lossless digital integrators (LDI) which give even more compact implementations for this application than the well-known class of Wave Digital Filters (WDF).
Measurements backup the simulation results, however, due to some minor implementation faults, first samples show a signal-to-noise ratio of only 45 dB instead of the expected 80 dB.
| © Christian Münker [ 04. Nov 2007 ] |
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